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ARM lays out plans for 5nm “Hercules” core design by 2020

By Jules Wang August 16, 2018, 11:41 am

Semiconductor design firm ARM has done something extremely out of character: it has announced a roadmap for its product timeline into 2020.

The chip designer is claiming that it is confident it can keep up with the pressure of always-connected 5G network demands and can beat Moore’s Law by breaking above the double-performance barrier in four year’s time. Furthermore, at a time when Intel’s position in the chip market appears to be unstable with Apple and traditional PC makers experimenting with different silicon for different form factors, ARM may be able to cement itself as the IP source for chipmakers into the next lucrative phase of computing — Windows on ARM through Qualcomm is a big example of that.


It will begin this year with plans to bring the Cortex-A76 design, announced in May, down from its current second-generation 10nm fabrication to 7nm with commercial products launching by the end of this year. ARM then moves into codename mode: “Deimos” will take over for 2019 based on the 7nm process, then “Hercules” will take a refined 7nm and then bring on 5nm in 2020. The company told us that Hercules will bring a 250 percent performance jump from 2016’s Cortex-A73.

All designs will run on a thermal design of 5 watts or less versus the 15W on standard Intel laptop products — realistically, that means phones will have to run with big.LITTLE arrangements of a few powerful cores and several efficiency cores. And unlike Intel’s offerings, workloads will still be on single threads. That said, the cores will be marketed to work with phone and tablet form factors. The watermarks that ARM expects us to be talking about in the next couple of years are streaming 8K video and high-quality mixed reality content.

Samsung has also announced its roadmap for silicon this year and it seems to be taking chips down to 4nm with new lithography technology and new transistor designs. Media were given an opportunity to ask questions about whether ARM’s fabricator partners were ready to take on challenges and costs associated with smaller dies. The company gave us assurances that it was lock step with said partners, but has yet to provide specifics.

Update: We asked a couple of questions relating to how ARM’s fabrication partners may be able to scale to new transistor technologies as die sizes shrink. Cost is a big issue in making these transitions and those costs eventually get passed along to consumers.

Here’s the response from ARM:

Arm IP is designed to be used on multiple generations of process nodes, and the IP itself is configurable to stay within area and power budgets.

For example, the Cortex-A76 is targeted at 10nm/7nm, and ‘Hercules’ at 7nm/5nm. Cortex-A76 also supports DynamIQ technology, which allows partners to scale the use from 1+3, 2+6 or 4+4 configurations. These configurations are examples used to serve entry, mid-range, and upper premium markets where process nodes vary.

This flexibility of process, and configuration options of the IP at implementation time, and DynamIQ technology, allow Arm partners to balance their needs across all the tiers in economically viable process nodes.


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